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  cy7c199cn 256k (32k x 8) static ram cypress semiconductor corporation ? 198 champion court ? san jose , ca 95134-1709 ? 408-943-2600 document #: 001-06435 rev. *b revised march 08, 2007 features ? fast access time: 12 ns, 15 ns, 20 ns, and 25 ns ? wide voltage range: 5.0v 10% (4.5v to 5.5v) ? cmos for optimum speed and power ? ttl-compatible inputs and outputs ? 2.0v data retention ? low cmos standby power ? automated power down when deselected ? available in pb-free 28-pin tsop i, 28-pin molded soj and 28-pin dip packages general description [1] the cy7c199cn is a high performance cmos asynchronous sram organized as 32k by 8 bits that supports an asynchronous memory interface. the device features an automatic power down feat ure that reduces power consumption when deselected. see the ?truth table? on page 3 in this data sheet for a complete description of read and write modes. the cy7c199cn is available in pb-free 28-pin tsop i, 28-pin molded soj and 28-pin dip package(s). logic block diagram product portfolio ?12 ?15 ?20 ?25 unit maximum access time 12 15 20 25 ns maximum operating current 85 80 75 75 ma maximum cmos standby current (low power) 500 500 500 500 a row decoder ram array column decoder input buffer sense amps a x power down circuit i/ox oe we ce x note 1. for best practices recommendations, refer to the cypress application note system design guidelines on www.cypress.com . [+] feedback
cy7c199cn document #: 001-06435 rev. *b page 2 of 14 pin layout and specifications a 5 a 6 a 7 a 8 a 9 a 10 a 11 a 12 a 13 a 14 io 0 io 1 io 2 v ss io 3 io 4 io 5 io 6 io 7 ce a 0 oe a 1 a 2 a 3 a 4 we v cc 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 28 dip a 5 a 6 a 7 a 8 a 9 a 10 a 11 a 12 a 13 a 14 io 0 io 1 io 2 v ss io 3 io 4 io 5 io 6 io 7 ce a 0 oe a 1 a 2 a 3 a 4 we v cc 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 28 soj oe a 1 a 2 a 3 a 4 we v cc a 5 a 6 a 7 a 8 a 9 a 10 a 11 a 12 a 13 a 14 io 0 io 1 io 2 v ss io 3 io 4 io 5 io 6 io 7 ce a 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 28 tsop i (8 x 13.4 mm) [+] feedback
cy7c199cn document #: 001-06435 rev. *b page 3 of 14 pin description pin type description dip soj tsop i a x input address inputs 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 21, 23, 24, 25, 26 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 21, 23, 24, 25, 26 2, 3, 4, 5, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 28 ce control chip enable 20 20 27 io x input or output data input outputs 11, 12, 13, 15, 16, 17, 18, 19 11, 12, 13, 15, 16, 17, 18, 19 18, 19, 20, 22, 23, 24, 25, 26 oe control output enable 22 22 1 v cc supply power (5.0v) 28 28 7 v ss supply ground 14 14 21 we control write enable 27 27 6 truth table ce oe we iox mode power h x x high-z deselect/power down stand by (i sb ) l l h data out read active (i cc ) l x l data in write active (i cc ) l h h high-z selected, outputs disabled active (i cc ) maximum ratings exceeding maximum ratings may impair the useful life of the device. thes e user guidelines are not tested. parameter description value unit t stg storage temperature ?65 to +150 c t amb ambient temperature with power applied (that is, case temperature) ?55 to +125 c v cc core supply voltage relative to v ss ?0.5 to +7.0 v v in , v out dc voltage applied to any pin relative to v ss ?0.5 to v cc + 0.5 v i out output short-circuit current 20 ma v esd static discharge voltage (in accordance with mil-std-883, method 3015) > 2001 v i lu latch-up current > 200 ma operating range range ambient temperature (t a ) voltage range (v cc ) commercial 0c to 70c 5.0v 10% industrial ?40c to 85c 5.0v 10% automotive-a [+] feedback
cy7c199cn document #: 001-06435 rev. *b page 4 of 14 dc electrical characteristics over the operating range (?12, ?15) [2] parameter description condition power ?12 ?15 unit min max min max v ih input high voltage ? 2.2 v cc + 0.3 2.2 v cc + 0.3 v v il input low voltage ? ?0.5 0.8 ?0.5 0.8 v v oh output high voltage v cc = min, i oh = ?4.0 ma ? 2.4 ? 2.4 ? v v ol output low voltage v cc = min, i ol = 8.0 ma ? ? 0.4 ? 0.4 v i cc v cc operating supply current v cc = max, i out = 0 ma, f = f max = 1/t rc ? ? 85 ? 80 ma i sb1 automatic ce power down current ttl inputs max v cc , ce v ih , v in v ih or v in v il , f = f max ? ? 30 ? 30 ma l ? 10 ? 10 ma i sb2 automatic ce power down current cmos inputs max v cc , ce v cc ? 0.3v, v in v cc ? 0.3v, or v in 0.3v, f = 0 ? ? 10 ? 10 ma l ? 500 ? 500 a i oz output leakage current gnd v i v cc , output disabled ? ?5 +5 ?5 +5 a i ix input leakage current gnd v i v cc ? ?5 +5 ?5 +5 a dc electrical characteristics over the operating range (?20, ?25) [2] parameter description condition power ?20 ?25 unit min max min max v ih input high voltage ? 2.2 v cc + 0.3 2.2 v cc + 0.3 v v il input low voltage ? ?0.5 0.8 ?0.5 0.8 v v oh output high voltage v cc = min, i oh = ?4.0 ma ? 2.4 ? 2.4 ? v v ol output low voltage v cc = min, i ol = 8.0 ma ? ? 0.4 ? 0.4 v i cc v cc operating supply current v cc = max, i out = 0 ma, f = f max = 1/t rc ? ? 75 ? 75 ma i sb1 automatic ce power down current ttl inputs max v cc , ce v ih , v in v ih or v in v il , f = f max ? ? 30 ? 30 ma l ? 10 ? 10 ma i sb2 automatic ce power down current cmos inputs max v cc , ce v cc ? 0.3v, v in v cc ? 0.3v, or v in 0.3v, f = 0 ? ? 10 ? 10 ma l ? 500 ? 500 a i oz output leakage current gnd vi v cc , output disabled ? ?5 +5 ?5 +5 a i ix input leakage current gnd vi v cc ? ?5 +5 ?5 +5 a note 2. v il (min) = ?2.0v for pulse durations of less than 20 ns. [+] feedback
cy7c199cn document #: 001-06435 rev. *b page 5 of 14 capacitance [3] parameter description conditions max unit c in input capacitance t a = 25c, f = 1 mhz, v cc = 5.0v 8 pf c out output capacitance 8 thermal resistance [3] parameter description conditions tsop i soj dip unit ja thermal resistance (junction to ambient) still air, soldered on a 3 4.5 square inch, two?layer printed circuit board 88.6 79 69.33 c/w jc thermal resistance (junction to case) 21.94 41.42 31.62 ac test loads ac test conditions parameter description nom unit c1 capacitor 1 30 pf c2 capacitor 2 5 r1 resistor 1 480 ? r2 resistor 2 255 r3 resistor 3 480 r4 resistor 4 255 r th resistor thevenin 167 v th voltage thevenin 1.73 v v cc v ss rise time 1 v/ns fall time 1 v/ns all input pulses 90% 10% 90% 10% v output r1 r2 c1 cc v output r3 c2 cc r4 output loads output loads for t hzoe ,t hzce &t hzwe * including scope and jig capacitance (b)* (a)* r th t v thevenin equivalent note 3. tested initially and after any design or process change that may affect these parameters. [+] feedback
cy7c199cn document #: 001-06435 rev. *b page 6 of 14 ac electrical characteristics [4] parameter description ?12 ?15 ?20 ?25 unit min max min max min max min max t rc read cycle time 12 ? 15 ? 20 ? 25 ? ns t aa address to data valid ? 12 ? 15 ? 20 ? 25 ns t oha data hold from address change 3 ? 3 ? 3 ? 3 ? ns t ace ce to data valid ? 12 ? 15 ? 20 ? 25 ns t doe oe to data valid ind?l/com?l ? 5 ? 7 ? 9 ? 9 ns automotive-a ? 6 ? ? ? ? ? ? t lzoe oe to low-z [5] 0 ? 0 ? 0 ? 0 ? ns t hzoe oe to high-z [5, 6] ? 5 ? 7 ? 9 ? 9 ns t lzce ce to low-z [5] 3 ? 3 ? 3 ? 3 ? ns t hzce ce to high-z [5, 6] ? 5 ? 7 ? 9 ? 9 ns t pu ce to power up 0 ? 0 ? 0 ? 0 ? ns t pd ce to power down ? 12 ? 15 ? 20 ? 20 ns t wc write cycle time [7] 12 ? 15 ? 20 ? 25 ? ns t sce ce to write end 9 ? 10 ? 15 ? 15 ? ns t aw address setup to write end 9 ? 10 ? 15 ? 15 ? ns t ha address hold from write end 0 ? 0 ? 0 ? 0 ? ns t sa address setup to write start 0 ? 0 ? 0 ? 0 ? ns t pwe we pulse width 8 ? 9 ? 15 ? 15 ? ns t sd data setup to write end 8 ? 9 ? 10 ? 10 ? ns t hd data hold from write end 0 ? 0 ? 0 ? 0 ? ns t hzwe we low to high-z [5, 6] ? 7 ? 7 ? 10 ? 10 ns t lzwe we high to low-z [5] 3 ? 3 ? 3 ? 3 ? ns data retention characteristics [8] parameter description condition min max unit v dr v cc for data retention 2.0 ? v i ccdr data retention current v cc = v dr = 2.0v, ce v cc ? 0.3v, v in v cc ? 0.3v or v in 0.3v ? 150 a t cdr chip deselect to data retention time 0 ? ns t r operation recovery time 200 ? s n otes 4. test conditions are based on a transition time of 3 ns or less and timing reference levels of 1.5v, and input pulse levels of 0 to 3.0v. 5. at any given temperature and voltage condition, t hzce is less than t lzce , t hzoe is less than t lzoe , and t hzwe is less than t lzwe for any given device. 6. t hzoe , t hzce , t hzwe are specified as in part (b) of the ?? on page 1 . transitions are measured 200 mv from steady state voltage. 7. the internal memory write time is defined by the overlap of ce low and we low. ce and we must be low to initiate a write, and the transition of any of these signals can terminate the write. the input data setup and hold timing must be referenced to the leading edge of the signal that terminates the write. 8. l-version only. [+] feedback
cy7c199cn document #: 001-06435 rev. *b page 7 of 14 timing waveforms data retention waveform read cycle 1 [9, 10] read cycle 2 [11, 12] ce data retention mode t cdr t r v cc address data out previous data valid data valid t rc t aa t oha address ce oe data out data valid t rc high z t ace t hzce t hzoe t doe t lzoe t lzce v cc current i cc i sb t pu 50% 50% t pd high z notes 9. device is continuously selected. oe = v il = ce . 10. we is high for read cycle. 11. this cycle is oe controlled and we is high read cycle. 12. address valid before or similar with ce transition low. [+] feedback
cy7c199cn document #: 001-06435 rev. *b page 8 of 14 write cycle 1 (we controlled) [13, 14, 15] write cycle 2 (ce controlled) [14, 16, 17] timing waveforms (continued) address ce we data in/out t wc data-in valid t sce t sa t aw t pwe t ha t hd t sd oe t hzoe undefined see footnotes address ce we data in/out t wc data-in valid t sce t sa t aw t ha t hd t sd high z high z notes 13. this cycle is we controlled, oe is high during write. 14. data in and/or out is high impedance if oe = v ih . 15. during this period the ios are in output state and input signals must not be applied. 16. this cycle is ce controlled. 17. if ce goes high simultaneously with we going high, the output remains in a high impedance state. [+] feedback
cy7c199cn document #: 001-06435 rev. *b page 9 of 14 write cycle 3 (we controlled, oe low) [18] timing waveforms (continued) address ce we data in out t wc data in valid t sce t sa t aw t pwe t ha t hd t sd t hzwe t lzwe undefined see footnotes undefined see footnotes note 18. the cycle is we controlled, oe low. the minimum write cycl e time is the sum of t hzwe and t sd . [+] feedback
cy7c199cn document #: 001-06435 rev. *b page 10 of 14 ordering information contact local sales representative r egarding availability of these parts. speed (ns) ordering code package diagram package type power op- tion operating range 12 cy7c199cn?12vc 51-85031 28-lead (300-mil) molded soj standard commercial cy7c199cn?12zc 51-85071 28 tsop i (8 x 13.4 mm) standard commercial cy7c199cn?12zxc 51-8 5071 28 tsop i (8 x 13.4 mm), pb-free standard commercial cy7c199cn?12vi 51-85031 28-lead (300-mil) molded soj standard industrial cy7c199cn?12vxi 51-85031 28-lead (300-mil) molded soj, pb-free standard industrial cy7c199cn?12vxa 51-85031 28-lead (300-mil) molded soj, pb-free standard automotive-a 15 cy7c199cn?15pc 51-85014 28 dip (6.9 x 35.6 x 3.5 mm) standard commercial cy7c199cn?15pxc 51-8 5014 28 dip (6.9 x 35.6 x 3.5 mm), pb-free standard commercial cy7c199cn?15vc 51-85031 28-lead (300-mil) molded soj standard commercial cy7c199cn?15vxc 51-85031 28-lead (300-mil) molded soj, pb-free standard commercial cy7c199cn?15zc 51-85071 28 tsop i (8 x 13.4 mm), pb-free standard commercial cy7c199cn?15zxc 51-8 5071 28 tsop i (8 x 13.4 mm), pb-free standard commercial cy7c199cn?15vi 51-85031 28-lead (300-mil) molded soj standard industrial cy7c199cnl?15vc 51-85031 28-lead (300-mil) molded soj low power commercial cy7c199cnl?15vxc 51-85031 28-lead (300-mil) molded soj, pb-free low power commercial cy7c199cnl?15zxc 51-85071 28 tsop i (8 x 13.4 mm), pb-free low power commercial cy7c199cnl?15vxi 51-85031 28-lead (300-mil) molded soj, pb-free low power industrial 20 cy7c199cn?20vc 51-85031 28-lead (300-mil) molded soj standard commercial cy7c199cn?20zi 51-85071 28 tsop i (8 x 13.4 mm) standard industrial cy7c199cn?20zxi 51-85071 28 tsop i (8 x 13.4 mm), pb-free standard industrial 25 cy7c199cn?25pc 51-85014 28 dip (6.9 x 35.6 x 3.5 mm) standard commercial cy7c199cn?25pxc 51-8 5014 28 dip (6.9 x 35.6 x 3.5 mm), pb-free standard commercial [+] feedback
cy7c199cn document #: 001-06435 rev. *b page 11 of 14 package diagrams figure 1. 28-pin tsop i (8 x 13.4 mm), 51-85071 51-85071-*g [+] feedback
cy7c199cn document #: 001-06435 rev. *b page 12 of 14 figure 2. 28-pin (300 mil) molded soj, 51-85031 package diagrams (continued) min. max. pin 1 id 0.291 0.300 0.050 typ. 0.007 0.013 0.330 0.350 0.120 0.140 0.025 min. 0.262 0.272 0.697 0.713 0.013 0.019 0.014 0.020 0.032 0.026 a a detail external lead design option 1 option 2 1 14 15 28 0.004 seating plane note : 1. jedec std ref mo088 2. body length dimension does not include mold protrusion/end flash mold protrusion/end flash shall not exceed 0.006 in (0.152 mm) per side 3. dimensions in inches 51-85031-*c [+] feedback
cy7c199cn document #: 001-06435 rev. *b page 13 of 14 ? cypress semiconductor corporation, 2006-2007. the information contained herein is subject to change without notice. cypress s emiconductor corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a cypress product. nor does it convey or imply any license under patent o r other rights. cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with cypress. furthermore, cypress does not authorize its products for use as critical components in life-support systems wh ere a malfunction or failure may reasonably be expected to re sult in significant injury to the user. the inclusion of cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemni fies cypress against all charges. figure 3. 28-pin (300 mil) pdip, 51-85014 all product and company names mentio ned in this document may be the tr ademarks of their respective holders. package diagrams (continued) dimensions in inches [mm] min. max. seating plane 0.260[6.60] 0.295[7.49] 0.090[2.28] 0.110[2.79] 0.055[1.39] 0.065[1.65] 0.015[0.38] 0.020[0.50] 0.015[0.38] 0.060[1.52] 0.120[3.05] 0.140[3.55] 0.009[0.23] 0.012[0.30] 0.310[7.87] 0.385[9.78] 0.290[7.36] 0.325[8.25] 0.030[0.76] 0.080[2.03] 0.115[2.92] 0.160[4.06] 0.140[3.55] 0.190[4.82] 1.345[34.16] 1.385[35.18] 3 min. 1 14 15 28 reference jedec mo-095 lead end option see lead end option see lead end option (lead #1, 14, 15 & 28) package weight: 2.15 gms 51-85014-*d [+] feedback
cy7c199cn document #: 001-06435 rev. *b page 14 of 14 document history page document title: cy7c199cn, 256k (32k x 8) static ram document number: 001-06435 rev. ecn no. issue date orig. of change description of change ** 430363 see ecn nxr new data sheet *a 684342 see ecn vkn added automotive -a information updated ordering information table *b 839904 see ecn vkn added t doe spec for automotive-a part in ac electrical characteristics table [+] feedback


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